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Are Nanosheet Transistor the Next (and Maybe Last) Step in Moore’s Law?

An anonymous reader quotes IEEE Spectrum:
Making smaller, better transistors for microprocessors is getting more and more difficult, not to mention fantastically expensive. Only Intel, Samsung, and Taiwan Semiconductor Manufacturing Co. (TSMC) are equipped to operate at this frontier of miniaturization. They are all manufacturing integrated circuits at the equivalent of what is called the 7-nanometer node… Right now, 7 nm is the cutting edge, but Samsung and TSMC announced in April that they were beginning the move to the next node, 5 nm. Samsung had some additional news: It has decided that the kind of transistor the industry had been using for nearly a decade has run its course. For the following node, 3 nm, which should begin limited manufacture around 2020, it is working on a completely new design.

That transistor design goes by a variety of names — gate-all-around, multibridge channel, nanobeam — but in research circles we’ve been calling it the nanosheet. The name isn’t very important. What is important is that this design isn’t just the next transistor for logic chips; it might be the last. There will surely be variations on the theme, but from here on, it’s probably all about nanosheets….

All in all, stacking nanosheets appears to be the best way possible to construct future transistors. Chipmakers are already confident enough in the technology to put it on their road maps for the very near future. And with the integration of high-mobility semiconductor materials, nanosheet transistors could well carry us as far into the future as anyone can now foresee.


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